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Support FAQs

Frequently Asked Questions

Why call the PICMG 1.3 specification SHB Express and not SBC Express?

SHB means System Host Board and the technical subcommittee that wrote the specification felt that SHB provided a good way to avoid confusion with PICMG 1.0 and PICMG 1.2 SBCs that support the PCI/ISA or PCI-X/PCI parallel bus interfaces. An SHB performs the same function as an SBC, but an SHB by virtue of the multiple PCI Express serial links along the board’s edge connectors supports multiple communication pathways into the SHB unlike the common parallel bus used in PICMG 1.0 SBCs. PICMG 1.3 SHBs therefore can handle greater data traffic into and out of the board as compared to PICMG 1.0 SBCs. We use the term SHB Express to define a system host board that uses PCI Express as the primary interface to the backplane. The terms “SHB Express” and “PICMG 1.3” are used interchangeably. Additionally, PICMG 1.3 SHBs must always be used with PICMG 1.3 backplanes.

What is meant by the terms “Server-Class” and “Graphics-class” as it relates to PICMG 1.3 board hardware?

Server and Graphics class refers to how the PCI Express electrical links are routed to the SHB’s card edge connectors A and B and how these links are in turn routed or “plumbed” to the option card slots and/or devices on a PICMG 1.3 backplane. Server-class SHBs usually feature two x8 PCI Express electrical links on edge connectors A and B plus either one x4 or four x1 PCIe links. Graphics-class SHBs usually feature one x16 PCI Express electrical link on edge connectors A and B plus either one x4 or four x1 PCIe links. The type of chipset utilized in an SHB design determines if the board is a server- or graphics-class SHB. Matching the class of a PICMG 1.3 SHB to the PICMG 1.3 backplane class results in the maximum use of all available option card slots and devices on a PICMG 1.3 backplane.

Does the PICMG 1.3 specification provide support for PCI Express Gen 2 products and can a PCI Express serial communication link support multiple PCI Express card slots like a PCI or PCI-X parallel bus?

Provisions have been worked into the specification that allow the PICMG 1.3 SHBs and backplanes to support both PCI Express Gen 1 and Gen 2 hardware. Remember that PCI Express is a point-to-point, high speed and scalable bandwidth serial communication interface and as such cannot support multiple card slot interfaces without some help. While the chipsets support multiple PCI Express links that can be routed to a PICMG 1.3 backplane to support a number of PCI Express option card slots, PCI Express fan-out switches or simply PCIe switches are also commonplace in many backplane designs. A PCI Express fan out switch takes an incoming PCI Express link and produces multiple PCI Express links. The basic function of a PCIe switch is similar to that of a PCI-to-PCI bridge chip in that the PCIe switch enables support for multiple PCI Express option card backplane slots.

Are soft power control features supported in the SHB Express specification?

Yes, the PICMG 1.3 specification addressed this limitation of PICMG 1.0 hardware. All stand-by voltage signals and soft power control signals as defined by the term ACPI and are supported in the SHB Express specification. The BIOS used on an SHB usually incorporates ACPI software modules to provide the wake and reset functions required in soft power control application.

Is Wake-On-LAN supported by the card slots on a PICMG 1.3 backplane?

Wake-On-LAN is indeed supported in the PICMG 1.3 specification. There will be system power supply limitations on how many option card slots could support devices that wake the CPU or CPUs on an SHB from the processors’ sleep states. The limitation stems from the relatively low current available on the 5V AUX rail from the power supply.

What is the purpose of the 5V AUX jumper on PICMG 1.3 backplanes and can the SHB be inserted or removed with the incoming AC voltage to the power supply still on?

The PICMG 1.3 specification requires that voltage be applied to the SHB’s 5V standby (or auxiliary) pins. If a power supply does not provide 5V AUX, the CPU will not properly power on. Normally this 5V AUX jumper is used to route 5V AUX to the CPU board. For power supplies without 5V AUX, this jumper routes regular 5V to the SHB’s 5V AUX pins. A PICMG 1.3 SHB should not be removed from the backplane slot with the incoming AC power turned on. Even if the power supply has been turned off by an orderly soft-control shutdown, the 5V standby voltage will remain active until the incoming AC to the system power supply has been turned off or unplugged. This is why most PICMG 1.3 backplanes have a 5V AUX LED indicator. When the 5V AUX LED is off, this is your indication that it is safe to remove the PICMG 1.3 SHB from the backplane.

What BIOS vendor does Trenton use on their boards?

All Trenton boards use BIOS firmware from American Megatrends Inc. or AMI. Like Trenton, AMI is also located in the Atlanta, Georgia metropolitan area which has allowed us to develop a customer-focused working relationship over the years. The responsive nature of the Trenton-AMI relationship allows us to deliver high-quality standard and custom BIOS firmware on Trenton products.

How can I tell if my Trenton SHB/SBC has the latest BIOS version?

The Trenton board’s BIOS version is displayed during POST, in the upper left corner of your display monitor and directly below memory count. The board’s BIOS version typically begins with the letters ‘TTI’ and is 8 characters long.

How do I get a customized BIOS that will display my company’s logo and specific company information during the system boot-up process? Or, is it possible to get a custom BIOS for a more detailed technical change to a board implementation such as a change in memory space allocations or specific register changes?

Contact the Trenton sales team by phone at 800.875.6031 or 770.287.3100 or via e-mail at to get a custom BIOS price and delivery quotation.